Germanium has much higher electron and hole mobility than silicon, therefore it has been considered to replace silicon for future high speed CMOS devices: Ritenour et al., Epitaxial Strained Germanium p-MOSFETs with HfO2 Gate Dielectric and TaN Gate Electrode, International Electron Devices Meeting Technical Digest, 2003, p 03–433; Chui et al., A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-k Dielectrics, International Electron Devices Meeting Technical Digest, 2003, p 03–437; Low et al., Germanium MOS: An Evaluation from Carrier Quantization and Tunneling Current, 2003 Symposium on VLSI Technology Digest, p 117–118; and Bai et al., Ge MOS Characteristics with CVD HfO2 Gate Dielectrics and TaN Gate Electrode, 2003 Symposium on VLSI Technology Digest, p 121. Germanium-on-insulator is particularly desired in order to obtain MOS field-effect transistors with low-leakage current together with high performance: Huang et al., Very Low Defects and High Performance Ge-On-Insulator p-MOSFETs with Al2O3 Gate Dielectrics, 2003 Symposium on VLSI Technology Digest, p 119; Takagi, Re-examination of Subband Structure Engineering in Ultra-Short Channel MOSFETs under Ballistic Carrier Transport, 2003 Symposium on VLSI Technology Digest, p 115. Pure germanium grown directly on silicon is also the best candidate for near-infrared photodetectors due to its compatibility with silicon technology and its high absorption in the near-infrared up to 1.55 μm. It has potential application in low-cost monolithic transceivers for optical communications: Colace et al., Efficient high-speed near-infrared Ge photodectors integrated on Si substrates, Appl Phys Lett., 2000, 76, 1231; Famà et al., High performance gernanium-on-silicon detectors for optical communications, Appl Phys Lett, 2002, 81, 586; Hartmann et al., Reduced pressure-chemical vapor deposition of Ge thick layers on Si (001) for 1.3–1.55-μm photodetection, Journal of Applied Physics, 2004, 95, 5905; and U.S. Pat. No. 6,645,831 B1, to Shaheen et al., granted Nov. 11, 2003, for Thermally Stable Crystalline Defect-Free Germanium Bonded to Silicon and Silicon Dioxide. Due to the process compatibility, it is possible to integrate high speed device with germanium-based photodectors for many potential applications.
Shaheen et al. has disclosed a method to form germanium film by bonding germanium wafer on silicon or silicon dioxide. A thinning step is needed to obtain the desired thickness, U.S. Pat. No. 6,645,831 B1, supra. Huang et al., also reported performance of Ge-on-oxide p-MOSFETs, wherein the Ge-on-oxide film was obtained by direct wafer bonding of SiO2/Ge and SiO2/Si wafers and subsequent etch-back of backside Ge. Huang et al., supra. All of these require the use of high quality germanium wafers. However, germanium wafers have poor mechanical and thermal properties, and high quality germanium wafers are still of limited supply.
Nakaharai et al. reported a Ge-condensation technique to fabricate Ge-on-insulator, Nakaharal et al., Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation technique, Appl Phys Lett, 2003, 83, 3516, however, only a 7 nm thick germanium layer was formed, and the film was under compressive strain. It is difficult to apply this technique for photodetector application, which requires a thicker film to increase the light absorption.
Liu et al. reported a liquid-phase epitaxy technique to fabricate germanium on insulator, Liu et al., High-quality single-crystal Ge on insulator by liquid-phase epitaxy on Si substrates, Appl Phys Lett, 2004, 84, 2563. This technique requires careful temperature control in order to initiate the recrystallization at the predetermined seeding region.
To avoid the use of bulk germanium wafers, a possible approach is to grow an epitaxial germanium layer on a silicon wafer, followed by transfer the germanium layer to an insulator, glass, or silicon substrate, by a direct wafer bonding technique.
Because of a large lattice mismatch between germanium and silicon, i.e., 4.2%, fabrication of germanium films on silicon having proper flatness and low defect density for high speed devices is difficult. Ritenour et al., supra, reported their work with epitaxial strained germanium p-MOSFET by growing thin germanium layer on thick relaxed SiGe buffer layer. Hofmann et al. were able to grow a 1 μm thick relaxed germanium layer by surfactant-mediated epitaxy on (111) silicon, Hofmann et al., Surfactant-grown low-doped germanium layers on silicon with high electron mobilities, Thin Solid Films, 1998, 321, 125. Luan et al., High-quality Ge epilayers on Si with low threading-dislocation densities, Appl Phys Lett, 1999, 75, 2909, have reported a technique to deposit germanium epilayer on single crystal silicon by first depositing at 350° C. and then at 600° C. This two-step process is also disclosed in U.S. Pat. No. 6,537,370 B1, to Hernandez et al., granted Mar. 25, 2003, for Process for obtaining a layer of single-crystal germanium on a substrate of single-crystal silicon, and products obtained. U.S. Pat. No. 6,635,110 B1, to Luan et al., granted Oct. 21, 2003, for Cycle thermal anneal for dislocation reduction, discloses a technique of cycle annealing to reduce the defect density of the germanium film. Using similar techniques, several groups have reported the use of the preceding techniques in fabrication of near-infrared germanium photodetectors: Colace et al., Efficient high-speed near-infrared Ge photodectors integrated on Si substrates, Appl Phys Lett., 2000, 76, 1231; Famà et al., High performance germanium-on-silicon detectors for optical communications, Appl Phys Lett, 2002, 81, 586; and Hartmann et al., Reduced pressure-chemical vapor deposition of Ge thick layers on Si (001) for 1.3–1.55-μm photodetection, Journal of Applied Physics, 2004, 95, 5905.
Cycle annealing reduces defects, which are concentrated near the germanium/silicon interface. However, it is difficult to completely remove this defect zone, because it is at the bottom of the germanium film.